Protel Design System Design Rule Check
PCB File : E:\我的坚果云\【单片机】\【0我的工程】\【---数控电源3.0\C-面板\3.1版\数控源-C.PcbDoc
Date     : 2022-11-22
Time     : 11:25:38

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
   Violation between Net IRQ is broken into 2 sub-nets. Routed To 75.00%
     Subnet : S-14     IRQ2-1        Subnet : fpc1-10  b1116-14 IRQ1-1   
Rule Violations :1

Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
Rule Violations :0

Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0

Processing Rule : Width Constraint (Min=0.2mm) (Max=2mm) (Preferred=0.4mm) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (All)
Rule Violations :0


Violations Detected : 1
Time Elapsed        : 00:00:00